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- affiliation: Hong Kong University of Science and Technology
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2020 – today
- 2024
[j67]Xiaodong Meng, Xing Li, Chi-Ying Tsui
, Wing-Hung Ki, Weiqiang Liu:
A 13.56-MHz Primary Driver With Fractional Capacitance Auto-Tuning Loop for Wireless-Powered Implantable Medical Devices. IEEE J. Solid State Circuits 59(10): 3218-3231 (2024)- [c160]Jingyu He, Fengbin Tu, Kwang-Ting Cheng, Chi-Ying Tsui:
AdaP-CIM: Compute-in-Memory Based Neural Network Accelerator Using Adaptive Posit. DATE 2024: 1-2 - [c159]Wing-Hung Ki, Yuan Yao, Chi-Ying Tsui:
Time Domain Analysis of Secondary Stage With Series Resonance Driving Rectifier Load. ISCAS 2024: 1-4 - [c158]Sayan Sarkar, Yuan Yao, Wing-Hung Ki, Chi-Ying Tsui:
Adaptive Digitally-Controlled Active Rectifier-Based Receiver for Bioimplants. ISCAS 2024: 1-5 - [c157]Fengshi Tian, Jiakun Zheng, Jingyu He, Jinbo Chen, Xiaomeng Wang, Chaoming Fang, Jie Yang, Mohamad Sawan, Chi-Ying Tsui, Kwang-Ting Cheng:
BOLS: A Bionic Sensor-direct On-chip Learning System with Direct-Feedback-Through-Time for Personalized Wearable Health Monitoring. ISCAS 2024: 1-5 - [c156]Linping Qu, Shenghui Song, Chi-Ying Tsui, Yuyi Mao:
How Robust is Federated Learning to Communication Error? A Comparison Study Between Uplink and Downlink Channels. WCNC 2024: 1-6 - [i19]Linping Qu, Shenghui Song, Chi-Ying Tsui:
FedAQ: Communication-Efficient Federated Edge Learning via Joint Uplink and Downlink Adaptive Quantization. CoRR abs/2406.18156 (2024) - [i18]Linping Qu, Yuyi Mao, Shenghui Song, Chi-Ying Tsui:
Energy-Efficient Channel Decoding for Wireless Federated Learning: Convergence Analysis and Adaptive Design. CoRR abs/2407.13703 (2024) - 2023
- [j66]Soumitra Pal, Gajendranath Chowdary, Wing-Hung Ki, Chi-Ying Tsui:
Energy-Efficient Dual-Node-Upset-Recoverable 12T SRAM for Low-Power Aerospace Applications. IEEE Access 11: 20184-20195 (2023) - [j65]Xizi Chen, Jingyang Zhu, Jingbo Jiang, Chi-Ying Tsui:
Tight Compression: Compressing CNN Through Fine-Grained Pruning and Weight Permutation for Efficient Implementation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(2): 644-657 (2023) - [j64]Xianghong Hu, Xuejiao Liu, Yu Liu, Haowei Zhang, Xijie Huang, Xihao Guan, Luhong Liang, Chi-Ying Tsui, Xiaoming Xiong, Kwang-Ting Cheng:
A Tiny Accelerator for Mixed-Bit Sparse CNN Based on Efficient Fetch Method of SIMO SPad. IEEE Trans. Circuits Syst. II Express Briefs 70(8): 3079-3083 (2023) - [c155]Jingyu He, Ziyang Shen, Fengshi Tian, Jinbo Chen, Jie Yang, Mohamad Sawan, Hsiang-Ting Chen, Paul Bogdan, Chi-Ying Tsui:
SNNOpt: An Application-Specific Design Framework for Spiking Neural Networks. AICAS 2023: 1-5 - [c154]Fengshi Tian, Xiaomeng Wang, Jinbo Chen, Jie Yang, Mohamad Sawan, Chi-Ying Tsui, Kwang-Ting (Tim) Cheng:
Binary is All You Need: Ultra-Efficient Arrhythmia Detection with a Binary-Only Compressive System. AICAS 2023: 1-5 - [c153]Jingyu He, Yucong Huang, Miguel Lastras, Terry Tao Ye, Chi-Ying Tsui, Kwang-Ting Cheng:
RVComp: Analog Variation Compensation for RRAM-Based in-Memory Computing. ASP-DAC 2023: 246-251 - [c152]Xiaodong Meng, Xing Li, Yuan Yao, Chi-Ying Tsui, Wing-Hung Ki:
A Primary Driver with Real-Time Resonance Tracking for Wireless-Powered Implantable Medical Devices. A-SSCC 2023: 1-3 - [c151]Fengshi Tian, Shiqi Zhao, Jingyu He, Jinbo Chen, Xiaomeng Wang, Jie Yang, Mohamad Sawan, Chi-Ying Tsui, Kwang-Ting (Tim) Cheng:
NOLS: A Near-sensor On-chip Learning System with Direct Feedback Alignment for Personalized Wearable Heart Health Monitoring. BioCAS 2023: 1-5 - [c150]Xizi Chen, Rui Pan, Xiaomeng Wang, Fengshi Tian, Chi-Ying Tsui:
Late Breaking Results: Weight Decay is ALL You Need for Neural Network Sparsification. DAC 2023: 1-2 - [c149]Jia Chen, Fengbin Tu, Kunming Shao, Fengshi Tian, Xiao Huo, Chi-Ying Tsui, Kwang-Ting Cheng:
AutoDCIM: An Automated Digital CIM Compiler. DAC 2023: 1-6 - [c148]Fengshi Tian, Xiaomeng Wang, Jinbo Chen, Jiakun Zheng, Hui Wu, Xuejiao Liu, Fengbin Tu, Jie Yang, Mohamad Sawan, Chi-Ying Tsui, Kwang-Ting (Tim) Cheng:
BIOS: A 40nm Bionic Sensor-defined 0.47pJ/SOP, 268.7TSOPs/W Configurable Spiking Neuron-in-Memory Processor for Wearable Healthcare. ESSCIRC 2023: 225-228 - [c147]Syed Mohsin Abbas, Chi-Ying Tsui, Marwan Jalaleddine, Warren J. Gross:
Step-GRAND: A Low Latency Universal Soft-Input Decoder. GLOBECOM (Workshops) 2023: 1668-1673 - [c146]Jingbo Jiang, Xizi Chen, Chi-Ying Tsui:
Accelerating Large Kernel Convolutions with Nested Winograd Transformation. VLSI-SoC 2023: 1-6 - [i17]Xiaomeng Wang, Fengshi Tian, Xizi Chen, Jiakun Zheng, Xuejiao Liu, Fengbin Tu, Jie Yang, Mohamad Sawan, Kwang-Ting Cheng, Chi-Ying Tsui:
A 137.5 TOPS/W SRAM Compute-in-Memory Macro with 9-b Memory Cell-Embedded ADCs and Signal Margin Enhancement Techniques for AI Edge Applications. CoRR abs/2307.05944 (2023) - [i16]Syed Mohsin Abbas, Marwan Jalaleddine, Chi-Ying Tsui, Warren J. Gross:
Step-GRAND: A Low Latency Universal Soft-input Decoder. CoRR abs/2307.07133 (2023) - [i15]Linping Qu, Shenghui Song, Chi-Ying Tsui, Yuyi Mao:
How Robust is Federated Learning to Communication Error? A Comparison Study Between Uplink and Downlink Channels. CoRR abs/2310.16652 (2023) - 2022
- [j63]Soumitra Pal, Wing-Hung Ki, Chi-Ying Tsui:
Soft-Error-Aware Read-Stability-Enhanced Low-Power 12T SRAM With Multi-Node Upset Recoverability for Aerospace Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 69(4): 1560-1570 (2022) - [c145]Xiaomeng Wang, Xuejiao Liu, Xianghong Hu, Xiaopeng Zhong, Xizi Chen, Yu Liu, Patrick Kong, Fengshi Tian, Chi-Ying Tsui:
TAC-RAM: A 65nm 4Kb SRAM Computing-in-Memory Design with 57.55 TOPS/W supporting Multibit Matrix-Vector Multiplication for Binarized Neural Network. AICAS 2022: 66-69 - [c144]Linping Qu, Shenghui Song, Chi-Ying Tsui:
FedDQ: Communication-Efficient Federated Learning with Descending Quantization. GLOBECOM 2022: 281-286 - [c143]Sayan Sarkar, Yuan Yao, Wing-Hung Ki, Chi-Ying Tsui:
Design Strategy of Off-Resonant Tertiary Coils for Uplink Detection in Biomedical Implants. ISCAS 2022: 156-159 - [c142]Sayan Sarkar, Jingbo Jiang, Wing-Hung Ki, Chi-Ying Tsui:
A 16-bit Encrypted On-chip Embedded System for Implantable Medical Devices. ISCAS 2022: 195-199 - 2021
- [i14]Jingbo Jiang, Xizi Chen, Chi-Ying Tsui:
A Reconfigurable Winograd CNN Accelerator with Nesting Decomposition Algorithm for Computing Convolution with Large Filters. CoRR abs/2102.13272 (2021) - [i13]Xizi Chen, Jingyang Zhu, Jingbo Jiang, Chi-Ying Tsui:
Tight Compression: Compressing CNN Through Fine-Grained Pruning and Weight Permutation for Efficient Implementation. CoRR abs/2104.01303 (2021) - [i12]Bo Zhang, Pedro V. Sander, Chi-Ying Tsui, Amine Bermak:
Microshift: An Efficient Image Compression Algorithm for Hardware. CoRR abs/2104.09820 (2021) - [i11]Linping Qu, Shenghui Song, Chi-Ying Tsui:
FedDQ: Communication-Efficient Federated Learning with Descending Quantization. CoRR abs/2110.02291 (2021) - 2020
- [j62]Lin Cheng, Xinyuan Ge, Wai Chiu Ng, Wing-Hung Ki, Jiawei Zheng, Tsz Fai Kwok, Chi-Ying Tsui, Ming Liu:
A 6.78-MHz Single-Stage Wireless Charger With Constant-Current Constant-Voltage Charging Technique. IEEE J. Solid State Circuits 55(4): 999-1010 (2020) - [j61]Xiaopeng Zhong, Man-Kay Law, Chi-Ying Tsui, Amine Bermak:
A Fully Dynamic Multi-Mode CMOS Vision Sensor With Mixed-Signal Cooperative Motion Sensing and Object Segmentation for Adaptive Edge Computing. IEEE J. Solid State Circuits 55(6): 1684-1697 (2020) - [j60]Lin Cheng, Xinyuan Ge, Langyu Hu, Yuan Yao, Wing-Hung Ki, Chi-Ying Tsui:
A 40.68-MHz Active Rectifier With Hybrid Adaptive On/Off Delay-Compensation Scheme for Biomedical Implantable Devices. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(2): 516-525 (2020) - [j59]Luheng Jia, Chi-Ying Tsui, Oscar C. Au, Kebin Jia:
A Low-Power Motion Estimation Architecture for HEVC Based on a New Sum of Absolute Difference Computation. IEEE Trans. Circuits Syst. Video Technol. 30(1): 243-255 (2020) - [j58]ChenYang Xia, Chi-Ying Tsui, YouZhe Fan:
Construction of Multi-Kernel Polar Codes With Kernel Substitution. IEEE Wirel. Commun. Lett. 9(11): 1879-1883 (2020) - [c141]Lin Cheng, Xinyuan Ge, Wai Chiu Ng, Wing-Hung Ki, Jiawei Zheng, Tsz Fai Kwok, Chi-Ying Tsui, Ming Liu:
Design of a Single-Stage Wireless Charger with 92.3%-Peak-Efficiency for Portable Devices Applications. ASP-DAC 2020: 1-2 - [c140]Xizi Chen, Jingyang Zhu, Jingbo Jiang, Chi-Ying Tsui:
Tight Compression: Compressing CNN Model Tightly Through Unstructured Pruning and Simulated Annealing Based Permutation. DAC 2020: 1-6
2010 – 2019
- 2019
- [j57]Xizi Chen, Jingbo Jiang, Jingyang Zhu, Chi-Ying Tsui:
SubMac: Exploiting the subword-based computation in RRAM-based CNN accelerator for energy saving and speedup. Integr. 69: 356-368 (2019) - [j56]Zizhen Zeng, Shanpu Shen, Xiaopeng Zhong, Xing Li, Chi-Ying Tsui, Amine Bermak, Ross D. Murch, Edgar Sánchez-Sinencio:
Design of Sub-Gigahertz Reconfigurable RF Energy Harvester From -22 to 4dB m With 99.8% Peak MPPT Power Efficiency. IEEE J. Solid State Circuits 54(9): 2601-2613 (2019) - [j55]Bo Zhang, Pedro V. Sander, Chi-Ying Tsui, Amine Bermak:
Microshift: An Efficient Image Compression Algorithm for Hardware. IEEE Trans. Circuits Syst. Video Technol. 29(11): 3430-3443 (2019) - [j54]Bo Wang, Man-Kay Law, Jun Yi, Chi-Ying Tsui, Amine Bermak:
A -12.3dB m UHF Passive RFID Sense Tag for Grid Thermal Monitoring. IEEE Trans. Ind. Electron. 66(11): 8811-8820 (2019) - [j53]Luheng Jia, Chi-Ying Tsui, Oscar C. Au, Kebin Jia:
A New Rate-Complexity-Distortion Model for Fast Motion Estimation Algorithm in HEVC. IEEE Trans. Multim. 21(4): 835-850 (2019) - [c139]Xizi Chen, Jingyang Zhu, Jingbo Jiang, Chi-Ying Tsui:
CompRRAE: RRAM-based convolutional neural network accelerator with reduced computations through a runtime activation estimation. ASP-DAC 2019: 133-139 - [c138]ChenYang Xia, YouZhe Fan, Chi-Ying Tsui:
A Two-Staged Adaptive Successive Cancellation List Decoding for Polar Codes. ISCAS 2019: 1-5 - [c137]Xiaodong Meng, Xing Li, Xiaopeng Zhong, Yuan Yao, Chi-Ying Tsui, Wing-Hung Ki:
A 2.2μ W 600kHz Frequency-Locked Relaxation Oscillator with 0.046%/V Voltage and 48.69ppm/°C Temperature Stability for IoT Sensor Node Applications. VLSI Circuits 2019: 44- - [c136]Lin Cheng, Xinyuan Ge, Wai Chiu Ng, Wing-Hung Ki, Jiawei Zheng, Tsz Fai Kwok, Chi-Ying Tsui, Ming Liu:
A 6.78MHz 92.3%-Peak-Efficiency Single-Stage Wireless Charger with CC-CV Charging and On-Chip Bootstrapping Techniques. VLSI Circuits 2019: 320- - [i10]ChenYang Xia, YouZhe Fan, Chi-Ying Tsui:
A Two-staged Adaptive Successive Cancellation List Decoding for Polar Codes. CoRR abs/1901.09222 (2019) - 2018
- [j52]Jiawei Zheng, Wing-Hung Ki, Chi-Ying Tsui:
Analysis and Design of a Ripple Reduction Chopper Bandpass Amplifier. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(4): 1185-1195 (2018) - [j51]Bo Wang, Man-Kay Law, Chi-Ying Tsui, Amine Bermak:
A 10.6 pJ⋅K2 Resolution FoM Temperature Sensor Using Astable Multivibrator. IEEE Trans. Circuits Syst. II Express Briefs 65-II(7): 869-873 (2018) - [j50]Xiaopeng Zhong, Bo Zhang, Amine Bermak, Chi-Ying Tsui, Man-Kay Law:
A Low-Power Compression-Based CMOS Image Sensor With Microshift-Guided SAR ADC. IEEE Trans. Circuits Syst. II Express Briefs 65-II(10): 1350-1354 (2018) - [j49]Jiawei Zheng, Wing-Hung Ki, Chi-Ying Tsui:
A Fully Integrated Analog Front End for Biopotential Signal Sensing. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(11): 3800-3809 (2018) - [j48]Mahsa Mousavi, YouZhe Fan, Chi-Ying Tsui, Jie Jin, Bin Li, Hui Shen:
Efficient Partial-Sum Network Architectures for List Successive-Cancellation Decoding of Polar Codes. IEEE Trans. Signal Process. 66(14): 3848-3858 (2018) - [j47]ChenYang Xia, Ji Chen, YouZhe Fan, Chi-Ying Tsui, Jie Jin, Hui Shen, Bin Li:
A High-Throughput Architecture of List Successive Cancellation Polar Codes Decoder With Large List Size. IEEE Trans. Signal Process. 66(14): 3859-3874 (2018) - [c135]Lin Cheng, Xinyuan Ge, Wing-Hung Ki, Chi-Ying Tsui:
A Simplified PWM Controller for Wireless Power Receiver Using a 3-Mode Reconfigurable Resonant Regulating Rectifier. APCCAS 2018: 473-475 - [c134]Langyu Hu, Lin Cheng, Yuan Yao, Tak-Sang Yim, Wing-Hung Ki, Chi-Ying Tsui:
A 40.68MHz Active Rectifier with Hybrid Delay Compensation Scheme. APCCAS 2018: 501-504 - [c133]Yuan Yao, Xiaodong Meng, Chi-Ying Tsui, Wing-Hung Ki:
Polyimide-Based Flexible 3-Coil Inductive Link Design and Optimization. APCCAS 2018: 505-508 - [c132]Xizi Chen, Jingbo Jiang, Jingyang Zhu, Chi-Ying Tsui:
A high-throughput and energy-efficient RRAM-based convolutional neural network using data encoding and dynamic quantization. ASP-DAC 2018: 123-128 - [c131]Jingyang Zhu, Jingbo Jiang, Xizi Chen, Chi-Ying Tsui:
SparseNN: An energy-efficient neural network accelerator exploiting input and output sparsity. DATE 2018: 241-244 - [c130]Xiaodong Meng, Xing Li, Yuan Yao, Chi-Ying Tsui, Wing-Hung Ki:
An Indoor Solar Energy Harvester with Ultra-Low-Power Reconfigurable Power-On-Reset-Styled Voltage Detector. ISCAS 2018: 1-5 - [c129]ChenYang Xia, YouZhe Fan, Ji Chen, Chi-Ying Tsui:
On Path Memory in List Successive Cancellation Decoder of Polar Codes. ISCAS 2018: 1-5 - [c128]Qian Yu, Farid Boussaïd, Amine Bermak, Chi-Ying Tsui:
Room-Temperature Dual-mode CMOS Gas-FET Sensor for Diabetes Detection. ISCAS 2018: 1-4 - [c127]Xiaopeng Zhong, Qian Yu, Amine Bermak, Chi-Ying Tsui, May-Kay Law:
A 2PJ/Pixel/Direction MIMO Processing Based CMOS Image Sensor for Omnidirectional Local Binary Pattern Extraction and Edge Detection. VLSI Circuits 2018: 247-248 - [i9]ChenYang Xia, Ji Chen, YouZhe Fan, Chi-Ying Tsui, Jie Jin, Hui Shen, Bin Li:
A High-Throughput Architecture of List Successive Cancellation Polar Codes Decoder with Large List Size. CoRR abs/1805.02916 (2018) - [i8]YouZhe Fan, ChenYang Xia, Ji Chen, Chi-Ying Tsui, Jie Jin, Hui Shen, Bin Li:
A Low-Latency List Successive-Cancellation Decoding Implementation for Polar Codes. CoRR abs/1806.11301 (2018) - 2017
- [j46]Lin Cheng, Wing-Hung Ki, Chi-Ying Tsui:
A 6.78-MHz Single-Stage Wireless Power Receiver Using a 3-Mode Reconfigurable Resonant Regulating Rectifier. IEEE J. Solid State Circuits 52(5): 1412-1423 (2017) - [j45]Xing Li, Yin-Ping Li, Chi-Ying Tsui, Wing-Hung Ki:
Wireless Power Transfer System WithΣ Δ -Modulated Transmission Power and Fast Load Response for Implantable Medical Devices. IEEE Trans. Circuits Syst. II Express Briefs 64-II(3): 279-283 (2017) - [j44]Jiawei Zheng, Wing-Hung Ki, Langyu Hu, Chi-Ying Tsui:
Chopper Capacitively Coupled Instrumentation Amplifier Capable of Handling Large Electrode Offset for Biopotential Recordings. IEEE Trans. Circuits Syst. II Express Briefs 64-II(12): 1392-1396 (2017) - [j43]Syed Mohsin Abbas, YouZhe Fan, Ji Chen, Chi-Ying Tsui:
High-Throughput and Energy-Efficient Belief Propagation Polar Code Decoder. IEEE Trans. Very Large Scale Integr. Syst. 25(3): 1098-1111 (2017) - [c126]Lin Cheng, Wing-Hung Ki, Chi-Ying Tsui:
A wireless power receiver with a 3-level reconfigurable resonant regulating rectifier for mobile-charging applications. ASP-DAC 2017: 33-34 - [c125]Jingyang Zhu, Zhiliang Qian, Chi-Ying Tsui:
BHNN: A memory-efficient accelerator for compressing deep neural networks with blocked hashing techniques. ASP-DAC 2017: 690-695 - [c124]ChenYang Xia, YouZhe Fan, Ji Chen, Chi-Ying Tsui, ChongYang Zeng, Jie Jin, Bin Li:
An implementation of list successive cancellation decoder with large list size for polar codes. FPL 2017: 1-4 - [c123]Syed Mohsin Abbas, YouZhe Fan, Ji Chen, Chi-Ying Tsui:
Concatenated LDPC-polar codes decoding through belief propagation. ISCAS 2017: 1-4 - [c122]Feng Gao, Amine Bermak, Chi-Ying Tsui, Farid Boussaïd:
Dual transduction Gas sensor based on a surface acoustic wave resonator. ISCAS 2017: 1-4 - [c121]Xiaopeng Zhong, Amine Bermak, Chi-Ying Tsui:
A low-offset dynamic comparator with area-efficient and low-power offset cancellation. VLSI-SoC 2017: 1-6 - [i7]Syed Mohsin Abbas, YouZhe Fan, Ji Chen, Chi-Ying Tsui:
Concatenated LDPC-Polar Codes Decoding Through Belief Propagation. CoRR abs/1703.05542 (2017) - [i6]Jingyang Zhu, Jingbo Jiang, Xizi Chen, Chi-Ying Tsui:
SparseNN: An Energy-Efficient Neural Network Accelerator Exploiting Input and Output Sparsity. CoRR abs/1711.01263 (2017) - [i5]ChenYang Xia, YouZhe Fan, Ji Chen, Chi-Ying Tsui:
On Path Memory in List Successive Cancellation Decoder of Polar Codes. CoRR abs/1712.02053 (2017) - 2016
- [j42]Jingyang Zhu, Zhiliang Qian, Chi-Ying Tsui:
BiLink: A high performance NoC router architecture using bi-directional link with double data rate. Integr. 55: 30-42 (2016) - [j41]YouZhe Fan, ChenYang Xia, Ji Chen, Chi-Ying Tsui, Jie Jin, Hui Shen, Bin Li:
A Low-Latency List Successive-Cancellation Decoding Implementation for Polar Codes. IEEE J. Sel. Areas Commun. 34(2): 303-317 (2016) - [j40]Zhiliang Qian, Da-Cheng Juan, Paul Bogdan, Chi-Ying Tsui, Diana Marculescu, Radu Marculescu:
A Support Vector Regression (SVR)-Based Latency Model for Network-on-Chip (NoC) Architectures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(3): 471-484 (2016) - [j39]Zhiliang Qian, Paul Bogdan, Chi-Ying Tsui, Radu Marculescu:
Performance Evaluation of NoC-Based Multicore Systems: From Traffic Analysis to NoC Latency Modeling. ACM Trans. Design Autom. Electr. Syst. 21(3): 52:1-52:38 (2016) - [c120]Jingyang Zhu, Zhiliang Qian, Chi-Ying Tsui:
LRADNN: High-throughput and energy-efficient Deep Neural Network accelerator using Low Rank Approximation. ASP-DAC 2016: 581-586 - [c119]Ji Chen, YouZhe Fan, ChenYang Xia, Chi-Ying Tsui, Jie Jin, Kai Chen, Bin Li:
Low-Complexity List Successive-Cancellation Decoding of Polar Codes Using List Pruning. GLOBECOM 2016: 1-6 - [c118]Pascal Giard, Gabi Sarkis, Alexios Balatsoukas-Stimming, YouZhe Fan, Chi-Ying Tsui, Andreas Peter Burg, Claude Thibeault, Warren J. Gross:
Hardware decoders for polar codes: An overview. ISCAS 2016: 149-152 - [c117]Jiawei Zheng, Wing-Hung Ki, Chi-Ying Tsui:
A low-power chopper bandpass amplifier for biopotential sensors. ISCAS 2016: 301-304 - [c116]Xiaodong Meng, Xing Li, Chi-Ying Tsui, Wing-Hung Ki:
An indoor solar energy harvesting system using dual mode SIDO converter with fully digital time-based MPPT. ISCAS 2016: 2354-2357 - [c115]Zizhen Zeng, Xing Li, Amine Bermak, Chi-Ying Tsui, Wing-Hung Ki:
A WLAN 2.4-GHz RF energy harvesting system with reconfigurable rectifier for wireless sensor network. ISCAS 2016: 2362-2365 - [c114]Lin Cheng, Wing-Hung Ki, Tat-To Wong, Tak-Sang Yim, Chi-Ying Tsui:
21.7 A 6.78MHz 6W wireless power receiver with a 3-level 1× / ½ × / 0× reconfigurable resonant regulating rectifier. ISSCC 2016: 376-377 - [c113]Syed Mohsin Abbas, Chi-Ying Tsui:
Low-latency approximate matrix inversion for high-throughput linear pre-coders in massive MIMO. VLSI-SoC 2016: 1-5 - [c112]Syed Mohsin Abbas, Chi-Ying Tsui:
Approximate Matrix Inversion for Linear Pre-coders in Massive MIMO. VLSI-SoC (Selected Papers) 2016: 192-212 - [e2]Youngsoo Shin, Chi-Ying Tsui, Jae-Joon Kim, Kiyoung Choi, Ricardo Reis:
VLSI-SoC: Design for Reliability, Security, and Low Power - 23rd IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2015, Daejeon, Korea, October 5-7, 2015, Revised Selected Papers. IFIP Advances in Information and Communication Technology 483, Springer 2016, ISBN 978-3-319-46096-3 [contents] - [i4]Pascal Giard, Gabi Sarkis, Alexios Balatsoukas-Stimming, YouZhe Fan, Chi-Ying Tsui, Andreas Burg, Claude Thibeault, Warren J. Gross:
Hardware Decoders for Polar Codes: An Overview. CoRR abs/1606.00737 (2016) - 2015
- [j38]Xing Li, Chi-Ying Tsui, Wing-Hung Ki:
A 13.56 MHz Wireless Power Transfer System With Reconfigurable Resonant Regulating Rectifier and Wireless Power Control for Implantable Medical Devices. IEEE J. Solid State Circuits 50(4): 978-989 (2015) - [j37]Xing Li, Xiaodong Meng, Chi-Ying Tsui, Wing-Hung Ki:
Reconfigurable Resonant Regulating Rectifier With Primary Equalization for Extended Coupling- and Loading-Range in Bio-Implant Wireless Power Transfer. IEEE Trans. Biomed. Circuits Syst. 9(6): 875-884 (2015) - [j36]Xing Li, Chi-Ying Tsui, Wing-Hung Ki:
Power Management Analysis of Inductively-Powered Implants with 1X/2X Reconfigurable Rectifier. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(3): 617-624 (2015) - [j35]Zhiliang Qian, Syed Mohsin Abbas, Chi-Ying Tsui:
FSNoC: A Flit-Level Speedup Scheme for Network on-Chips Using Self-Reconfigurable Bidirectional Channels. IEEE Trans. Very Large Scale Integr. Syst. 23(9): 1854-1867 (2015) - [c111]YouZhe Fan, Ji Chen, ChenYang Xia, Chi-Ying Tsui, Jie Jin, Hui Shen, Bin Li:
Low-latency list decoding of polar codes with double thresholding. ICASSP 2015: 1042-1046 - [c110]Xing Li, Chi-Ying Tsui, Wing-Hung Ki:
UHF energy harvesting system using reconfigurable rectifier for wireless sensor network. ISCAS 2015: 93-96 - [c109]Luheng Jia, Chi-Ying Tsui, Oscar C. Au, Amin Zheng:
A fast variable block size motion estimation algorithm with refined search range for a two-layer data reuse scheme. ISCAS 2015: 1206-1209 - [c108]Xing Li, Chi-Ying Tsui, Wing-Hung Ki:
12.8 Wireless power transfer system using primary equalizer for coupling- and load-range extension in bio-implant applications. ISSCC 2015: 1-3 - [c107]Syed Mohsin Abbas, YouZhe Fan, Ji Chen, Chi-Ying Tsui:
Low complexity belief propagation polar code decoder. SiPS 2015: 1-6 - [c106]Youngsoo Shin, Chi-Ying Tsui:
Message from the technical program chairs. VLSI-SoC 2015: IX - [i3]YouZhe Fan, Ji Chen, ChenYang Xia, Chi-Ying Tsui, Jie Jin, Hui Shen, Bin Li:
Low-latency List Decoding Of Polar Codes With Double Thresholding. CoRR abs/1504.03437 (2015) - [i2]Syed Mohsin Abbas, YouZhe Fan, Ji Chen, Chi-Ying Tsui:
Low Complexity Belief Propagation Polar Code Decoders. CoRR abs/1505.04979 (2015) - 2014
- [j34]YouZhe Fan, Chi-Ying Tsui:
An Efficient Partial-Sum Network Architecture for Semi-Parallel Polar Codes Decoder Implementation. IEEE Trans. Signal Process. 62(12): 3165-3179 (2014) - [j33]Hui Shao, Xing Li, Chi-Ying Tsui, Wing-Hung Ki:
A Novel Single-Inductor Dual-Input Dual-Output DC-DC Converter With PWM Control for Solar Energy Harvesting System. IEEE Trans. Very Large Scale Integr. Syst. 22(8): 1693-1704 (2014) - [c105]Zhiliang Qian, Da-Cheng Juan, Paul Bogdan, Chi-Ying Tsui, Diana Marculescu, Radu Marculescu:
A comprehensive and accurate latency model for Network-on-Chip performance analysis. ASP-DAC 2014: 323-328 - [c104]Yuankun Xue, Zhiliang Qian, Paul Bogdan, Fan Ye, Chi-Ying Tsui:
Disease Diagnosis-on-a-Chip: Large Scale Networks-on-Chip based Multicore Platform for Protein Folding Analysis. DAC 2014: 104:1-104:6 - [c103]YouZhe Fan, Chi-Ying Tsui:
Low-latency MAP demapper architecture for coded modulation with iterative decoding. ISCAS 2014: 730-733 - [c102]Xing Li, Yan Lu