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Zilog Z8

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Zilog Z8 processor

The Zilog Z8 is a microcontroller architecture, originally introduced in 1979, which today also includes the eZ8 Encore![1], eZ8 Encore! XP, and eZ8 Encore! MC families.

Signifying features of the architecture are up to 4096 fast on-chip registers which may be used as accumulators, pointers, or as ordinary RAM. A 16-bit address space for between 1K and 64K of either OTP ROM or Flash memory are used to store code and constants, and there is also a second 16-bit address space which may be used for large applications.

On chip peripherals include A/D converters, SPI and I²C channels, IrDA encoders/decoders etc. There are versions with from 8 up to 80 pins, housed in PDIP, MLF, SSOP, SOIC and LQFP packages. The eZ8 Encore! series can be programmed and debugged through a single pin serial interface.

The basic architecture, a modified (non strict) Harvard architecture, is technically very different from the Zilog Z80. Despite this, the instruction set and assembly syntax are quite similar to other Zilog processors: Load/store operations uses the same LD mnemonic (no MOV or MOVEs), typifying instructions such as DJNZ, are the same, and so on.

A free C compiler and IDE can be downloaded from Zilog's website.

Primary competitors include the somewhat similar[2] Microchip PIC family, and all the Intel 8051 descendants. Also more traditional "von Neumann based" single chip microcontrollers may be regarded as competitors, such as the 6800/6809 based Motorola 68HC11, the Hitachi H8 family, and Z80-derivatives, such as Toshiba TLCS-870, to name just a few.

Product line

  • ROMless: Models without integrated ROM.
  • ROM: Models with integrated ROM.
  • OTP: Models with integrated OTP ROM.
  • Low Voltage: Working voltage run as low as 2V.
  • GP: General purpose microcontroller.
  • Encore!: Integrated flash-based memory.
  • Encore! XP: Encore! with sensors.
  • Encore! MC (Motor Control): Motor control applications.

Notes

  1. ^ The "Encore!" products contains the newer eZ8 core which is 2-3 times as clock cycle efficient as the original Z8 core.
  2. ^ The PIC and the 8051 are using Harvard architectures as well, but in a more rigid manner.