NOT gate
| INPUT A |
OUTPUT NOT A |
| 0 | 1 |
| 1 | 0 |
The NOT gate or inverter is a digital logic gate that implements logical negation. It behaves according to the truth table to the right. A HIGH output (1) results if the inputs is LOW (0). If the input is HIGH (1), a LOW output (0) results.
Symbols
There are two symbols for NOT gates: the 'military' symbol and the 'rectangular' symbol. For more information see Logic Gate Symbols
Hardware Description and Pinout
NOT Gates are basic logic gates, and as such they are recognised in TTL and CMOS ICs. The standard, 4000 series, CMOS IC is the 4049, which includes six independent NOT gates. The pinout diagram is as follows:
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1 Vdd 2 Output Q1 3 Input A1 4 Output Q2 5 Input A2 6 Output Q3 7 Input A3 8 Vss 9 Input A4 10 Output Q4 11 Input A5 12 Output Q5 13 n.c. 14 Input A6 15 Output Q6 16 n.c. |
This device is available from most semiconductor manufacturers such as Philips. It is usually available in both through-hole DIL and SOIC format. Datasheets are readily available in most Datasheet Databases.
Implementations
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Alternatives
If no specific NOT gates are available, one can be made from NAND gates in the configuration shown below. Alternatively, a NOR gate could be used in the same configuration. Any logic gate can be made from a combination of NAND gates or NOR gates.