![](https://github.com/fpgasystems/Coyote/raw/master/img/cyt_logo_light.png)
Coyote is a framework that offers operating system abstractions and a variety of shared networking (RDMA, TCP/IP), memory (DRAM, HBM) and accelerator (GPU) services for modern heterogeneous platforms with FPGAs, targeting data centers and cloud environments.
Some of Coyote's features:
- Multiple isolated virtualized vFPGA regions (with individual VMs)
- Nested dynamic reconfiguration (independently reconfigurable layers: Static, Service and Application)
- RTL and HLS user logic support
- Unified host and FPGA memory with striping across virtualized DRAM/HBM channels
- TCP/IP service
- RDMA RoCEv2 service (compliant with Mellanox NICs)
- GPU service
- Runtime scheduler for different host user processes
- Multithreading support
![](https://github.com/fpgasystems/Coyote/raw/master/img/cyt_ov_light.png)
Full Vivado/Vitis
suite is needed to build the hardware side of things. Hardware server will be enough for deployment only scenarios. Coyote runs with Vivado 2022.1
. Previous versions can be used at one's own peril.
Following AMD platforms are supported: vcu118
, Alveo u50
, Alveo u55c
, Alveo u200
, Alveo u250
and Alveo u280
. Coyote is currently being developed on the HACC cluster at ETH Zurich. For more information and possible external access check out the following link: https://systems.ethz.ch/research/data-processing-on-modern-hardware/hacc.html
CMake
is used for project creation. Additionally Jinja2
template engine for Python is used for some of the code generation. The API is writen in C++
, 17 should suffice (for now).
If networking services are used, to generate the design you will need a valid UltraScale+ Integrated 100G Ethernet Subsystem license set up in Vivado
/Vitis
.
To run the virtual machines on top of individual vFPGAs the following packages are needed: qemu-kvm
, build-essential
and kmod
.
Initialize the repo and all submodules:
$ git clone --recurse-submodules https://github.com/fpgasystems/Coyote
To build an example hardware project (generate a shell image):
$ mkdir build_hw && cd build_hw
$ cmake <path_to_cmake_config> -DFDEV_NAME=<target_device> -DEXAMPLE=<target_example>
Generate all projects and compile all bitstreams:
$ make project
$ make bitgen
The bitstreams will be generated under bitstreams
directory.
This initial bitstream can be loaded via JTAG.
Further custom shell bitstreams can all be loaded dynamically.
Netlist with the official static layer image is already provided under hw/checkpoints
. We suggest you build your shells on top of this image.
This default image is built with -DEXAMPLE=static
.
After the bitstream is loaded, the driver can be inserted once for the initial static image.
$ cd driver && make
$ insmod coyote_drv.ko <any_additional_args>
Provided software applications (as well as any other) can be built with the following commands:
$ mkdir build_sw && cd build_sw
$ cmake <path_to_cmake_config>
$ make
@inproceedings{coyote,
author = {Dario Korolija and Timothy Roscoe and Gustavo Alonso},
title = {Do {OS} abstractions make sense on FPGAs?},
booktitle = {14th {USENIX} Symposium on Operating Systems Design and Implementation ({OSDI} 20)},
year = {2020},
pages = {991--1010},
url = {https://www.usenix.org/conference/osdi20/presentation/roscoe},
publisher = {{USENIX} Association}
}
Copyright (c) 2023 FPGA @ Systems Group, ETH Zurich
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