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[Seq] Introduce seq.initial, !seq.immutable and replace powerOn value with initial value in compreg by uenoku · Pull Request #7553 · llvm/circt · GitHub
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[Seq] Introduce seq.initial, !seq.immutable and replace powerOn value with initial value in compreg #7553

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merged 1 commit into from
Aug 30, 2024

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@uenoku uenoku commented Aug 26, 2024

This PR extends compreg's powerOnValue operand to be able to capture more complicated initialization such as firreg's randomized initialization or DPI calls. This change should make register initialization more modular and a step forward towards #7213.

While ASICs might not have explicit initial values, they are crucial for simulation
and FPGA implementation. FPGA designs often require constant initial values, while
simulation allows for more complex initialization using expressions like function calls
$random, $readmem, and $fopen.

seq.compreg has a (optional) powerOn operand that is lowered into inlined assignment in SV which allows users to initialize registers with user-specified values. However this representation is not sufficient for initialization with function calls.

In order to represent various kinds of initialization, seq.initial op and !seq.immutable type
are introduced. The seq.initial operation produces values with types wrapped in !seq.immutable.
The !seq.immutable type wrapper prevents initial values from depending on time-variant values.
Stateful operations typically require corresponding initial values with the !seq.immutable type.
This ensures that the initial state of the operation is well-defined and independent of time-variant factors.

Example Input:

%r_init, %u_init = seq.initial {
  %rand = sv.macro.ref.se @RANDOM() : () -> i32
  %c0_i32 = hw.constant 0 : i32
  seq.yield %rand, %c0_i32 : i32, i32
} : !seq.immutable<i32>, !seq.immutable<i32>
%r = seq.compreg %i, %clk initial %r_init : i32
%u = seq.compreg %i, %clk initial %u_init : i32

Output Verilog:

reg [31:0] r;
initial
  r = `RANDOM;
reg [31:0] u = 32'h0;

@uenoku uenoku force-pushed the dev/hidetou/seq-initial-2 branch 3 times, most recently from 41a004a to 7d2bc9a Compare August 26, 2024 12:58
lib/Dialect/Seq/SeqOps.cpp Show resolved Hide resolved
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@fabianschuiki fabianschuiki left a comment

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I like the idea of having a separate set of operations define the initial value for registers, instead of trying to add regions to the registers to compute initial values. The separate seq.initial can have its results used multiple times, and there is a potential extension where seq.initial could accept !seq.immutable<T> operands that are available inside the body as T block arguments.

Will it be possible to represent the FirReg randomization using seq.initial in the future, and possibly to combine FirReg and CompReg into a Reg?

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uenoku commented Aug 28, 2024

there is a potential extension where seq.initial could accept !seq.immutable operands

Yes. This requires shceduling of initial operations while lowering but it's feasible to do that.

Will it be possible to represent the FirReg randomization using seq.initial in the future, and possibly to combine FirReg and CompReg into a Reg?

Yes, that's definitely the goal.

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@prithayan prithayan left a comment

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I think this is a great idea, looks good to me.

lib/Dialect/Seq/SeqOps.cpp Show resolved Hide resolved
@uenoku uenoku merged commit b937bcf into main Aug 30, 2024
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@uenoku uenoku deleted the dev/hidetou/seq-initial-2 branch August 30, 2024 05:08
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4 participants