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Size and weight variation: Difference between revisions
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→Generation II: Prevent rrc function name from being italicized
(→Generation II: Just using a multiplier of 256 instead of concatenation, since IMO it's a bit clearer (there isn't really a standardized symbol for it, and the Gen 3 & 4 section does the same) | Adding floor to division in the equation | Making the list of sizes by probability sortable, so it can be sorted by probability) |
m (→Generation II: Prevent rrc function name from being italicized) |
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A {{wp|Bitwise operation#Rotate through carry|rotate right carry}} (rrc) is performed on the four bits comprising the Attack and Defense IVs, the four bits comprising the Speed and Special IVs, and the eight bits comprising the Trainer ID. After this, the two four-bit IVs are concatenated to generate a single eight bit number, which is then {{wp|Exclusive or|XOR}}'d with the Trainer ID, as follows. | A {{wp|Bitwise operation#Rotate through carry|rotate right carry}} (rrc) is performed on the four bits comprising the Attack and Defense IVs, the four bits comprising the Speed and Special IVs, and the eight bits comprising the Trainer ID. After this, the two four-bit IVs are concatenated to generate a single eight bit number, which is then {{wp|Exclusive or|XOR}}'d with the Trainer ID, as follows. | ||
<math>bc = (256 \cdot rrc(IV_1) + \ rrc(IV_2)) \oplus rrc(ID)</math> | <math>bc = (256 \cdot \operatorname{rrc}(IV_1) + \operatorname{rrc}(IV_2)) \oplus \operatorname{rrc}(ID)</math> | ||
Afterwards, <code>bc</code> is put through two checks: | Afterwards, <code>bc</code> is put through two checks: | ||